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See pins, Test and Debug
Pins, Hot Swap
BD_SEL# 11-1, 11-6
CPCISW 11-1, 11-9
ENUM# 11-2, 11-7
LEDon# 11-2, 11-10
Pins, Local Bus Mode Independent Interface
BCLKo 11-9, 13-3, 13-6
CPCISW 11-1, 11-9, 13-3, 13-6
CS[1:0]# 11-9, 13-3, 13-6
CS2# 11-3, 11-9, 13-3, 13-6
CS3# 11-3, 11-9, 13-3, 13-6
GPIO[8, 3:0] 4-11, 6-5, 11-3, 11-10, 13-3
LCLK 11-1, 11-10, 12-2, 13-3, 13-6
LEDon# 11-2, 11-10, 13-3, 13-6
LGNT 2-5, 11-10, 13-3, 13-6
LINTi[2:1] 11-2, 11-10, 13-3, 13-6
LLOCKo# 2-4, 11-3, 11-9, 13-3, 13-6
LPMESET 11-2, 11-11, 13-3, 13-6
LPMINT# 11-11, 13-3, 13-6
LREQ 2-5, 11-2, 11-11, 13-3, 13-6
LRESETo# 3-1, 11-11, 13-3, 13-6
MODE 11-2, 11-11, 13-3, 13-6
WAITo# 2-5, 11-3, 11-9, 13-3, 13-6
Pins, Multiplexed Bus Mode Interface
ADS# 2-4, 11-12, 13-3, 13-6
ALE 2-4, 11-12, 13-3, 13-6
BLAST# 11-12, 13-3, 13-6
BTERM# 2-8, 11-1, 11-12, 13-3, 13-6
GPIO[7:4] 4-11, 6-5, 11-3, 11-13, 13-3, 13-6
LA[23:2] 11-13, 13-3, 13-6
LA[27:24] 11-3, 11-12, 13-3, 13-6
LAD[31:0] 2-3, 11-3, 11-13, 13-3, 13-6
LBE[3:0]# 2-4, 11-13, 13-3, 13-6
LW/R# 2-4, 11-14, 13-3, 13-6
RD# 2-4, 10-22–10-30, 11-14, 13-3, 13-6
READY# 2-5, 2-8, 11-2, 11-14, 13-3, 13-6
WR# 2-5, 10-22–10-30, 11-14, 13-3, 13-6
pins, no connect (NC, µBGA)
11-4, 13-6
pins, Non-Multiplexed Bus Mode Interface
to prefetch
Pins, Non-Multiplexed Bus Mode Interface
ADS# 11-15, 13-3, 13-6
ALE 11-15, 13-3, 13-6
BLAST# 11-15, 13-3, 13-6
BTERM# 11-15, 13-3, 13-6
GPIO[7:4] 11-15, 13-3, 13-6
LA[23:2] 11-16, 13-3, 13-6
LA[27:24] 11-15, 13-3, 13-6
LBE[3:0]# 2-4, 11-16, 13-3, 13-6
LD[31:0] 2-4, 11-3, 11-16, 13-3, 13-6
LW/R# 2-4, 11-16, 13-3, 13-6
RD# 2-4, 11-17, 13-3, 13-6
READY# 2-5, 11-17, 13-3, 13-6
WR# 2-5, 11-17, 13-3, 13-6
Pins, PCI System Bus Interface
AD[31:0] 11-7, 13-3, 13-6
C/BE[3:0]# 4-2, 11-7, 13-3, 13-6
DEVSEL# 11-7, 13-3, 13-6
ENUM# 11-2, 11-7, 13-3, 13-6
FRAME# 11-7, 13-3, 13-6
IDSEL 11-7, 13-3, 13-6
INTA# 10-11, 11-7, 13-3, 13-6
IRDY# 2-1, 11-7, 13-3, 13-6
LOCK# 11-7, 13-3, 13-6
PAR 11-8, 13-3, 13-6
PCLK 11-8, 12-2, 13-3, 13-6
PERR# 11-8, 13-3, 13-6
PME# 11-8, 13-3, 13-6
RST# 3-1, 11-8, 13-3, 13-6
SERR# 11-8, 13-3, 13-6
STOP# 11-8, 13-3, 13-6
TRDY# 2-1, 4-4, 11-8, 13-3, 13-6
pins, Power and Ground (µBGA)
VDD11-4, 13-6
VI/O11-4, 13-6
VSS11-4, 13-6
pins, Power and Ground (PQFP)
VDD11-1, 11-4, 13-3
VI/O11-4, 13-3
VSS11-2, 11-4, 13-3
Pins, Serial EEPROM Interface
EECS 11-5, 13-3, 13-6
EEDI 11-5, 13-3, 13-6
EEDO 11-1, 11-5, 11-6, 13-3, 13-6
EESK 11-5, 13-3, 13-6
Pins, Test and Debug
BD_SEL# 11-1, 11-6, 13-3, 13-6
TCK 11-2, 11-6, 11-18, 13-3, 13-6
TDI 11-2, 11-6, 11-18, 13-3, 13-6
TDO 11-6, 11-18, 13-3, 13-6
TEST 11-1, 11-6, 13-3, 13-6
TMS 11-2, 11-6, 11-18, 13-3, 13-6
TRST# 11-2, 11-6, 11-18, 13-3, 13-6
platform, reset 8-2
PLX Technology, Inc.
company background 1-1
product ordering and customer support A-1
PLXMon 3-2, 6-2
PMC
register 3-3, 3-5, 7-2, 10-12 typical adapter card 1-3
PMCAPID 3-3, 7-1, 10-12
PMCSR 3-3, 3-5, 6-2, 7-2, 7-3, 10-1, 10-2, 10-13, 10-14,
10-37, 11-11
PMCSR_BSE 10-13
PMDATA 3-5, 7-2, 7-3, 10-14, 10-37
PMDATASCALE (Hidden 2) 7-2, 7-3, 10-13, 10-37
PMDATASEL (Hidden 1) 7-2, 7-3, 10-14, 10-37
PME# 11-8, 13-3, 13-6
PMNEXT 3-3, 3-7, 7-1, 10-12
power management 7-1–7-3
capabilities 10-2, 10-12 capability ID register 10-12 control/status 10-13
D0-D3and D3hotstates 10-12 data 10-1, 10-14, 10-37
enumerator set 6-2
features 1-3
hidden registers 10-1, 10-3
ID 10-1
local interrupt 6-2
new capability function 3-7 next capability pointer 10-12
PCI specification 1-3, 1-5, 7-2, 10-12
pins 11-8, 11-11
registers 3-3, 3-6, 10-1, 10-2, 10-3, 10-12–10-13, 10-14,
10-37
status 10-1
Power, Early 8-1, 8-2, 11-1, 11-6
See Early Power
PQFP
product ordering and support A-1 specs 13-1–13-3
precharge bias voltage 8-1, 8-2, 12-2 bus interface pins 11-7–11-8
test and debug pins 11-6 preempt 2-5, 11-10 prefetch
counter 10-21–10-29
programmable 1-5
size 4-1
timing diagrams, settings in 4-30, 4-40
Local Bus 4-3
memory mapping 2-1–2-2
PCI Target 4-1–4-4, 10-21–10-29
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PCI Target | | | Programmable |