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Embedded

design 11-1

systems 1-1

Endian, Big/Little 2-10–2-12

Byte Lane mode and byte ordering 10-22, 10-24, 10-26,

10-28, 10-30

conversion 1-1, 1-3, 1-5, 4-4

Local Bus 2-10–2-11

PCI Bus Little Endian mode 2-1

ENUM# 1-2, 8-1, 8-3, 10-14, 11-2, 11-7, 13-3, 13-6

EROMBA 3-4, 4-4, 10-20

EROMBRD 3-4, 4-5, 10-29

EROMRR 3-3, 4-4, 10-10, 10-18

expansion ROM 1-3, 2-10, 3-3, 4-1, 4-4, 4-7, 10-2, 10-3

Local Bus width 10-29 space 3-7, 4-1, 4-7

access, address decode enable 10-10

input enables, BTERM# and READY# 10-29


 

debug

to I/O

 

Local Address 4-1

remap 10-20

external wait states 2-10, 4-1, 4-41

F

FIFOs 10-35

CNTRL, in 10-35

Continuous Burst mode 2-10

PCI Target 1-3–1-5, 3-1, 4-1–4-3, 4-4

response to full/empty 4-8

flush 4-2

FRAME# 11-7, 13-3, 13-6

G

general purpose I/O 6-1–6-3, 11-3, 11-9, 13-3, 13-6 control register (GPIOC) 10-36–10-37

timing diagrams 4-11, 6-5

See Also GPIO-related entries

Generator

programmable interrupt 1-1, 1-3

programmable wait states 4-1, 11-9, 11-12, 11-15

GPIO

programmable general purpose I/O 1-3 SMARTarget 1-1

See Also general purpose I/O

GPIO[7:4] 4-11, 6-5, 11-3, 11-13, 11-15, 13-3, 13-6

GPIO[8, 3:0] 4-11, 6-5, 11-3, 11-10, 13-3

GPIOC 6-3, 10-36–10-37

H

Header

format 10-18

PCI type 3-6

hidden registers 3-4, 3-5, 7-2, 7-3, 10-1, 10-3, 10-13,

10-14, 10-37

High-Polarity mode 10-33

hold waveform 12-3

Hot Swap 8-1–8-4, 10-14

Control/Status register (HS_CSR) 1-2, 8-1

Silicon 1-2

See Also CompactPCI Hot-Plug system driver 8-3 HS_CNTL 3-3, 8-4, 10-14

HS_CSR 1-2, 8-1, 8-3, 10-14, 11-2

HS_NEXT 3-3, 3-7, 8-4, 10-14

I

I/O

accelerator 1-1

accesses 2-1, 4-4, 10-7, 10-13 disabled in D3hot state 7-2 internal registers 3-7

base address 10-7

buffers 1-2, 8-1, 8-2, 11-4


 

i960J function, not supported

to LCLK

 

 


Data I/O for programming serial EEPROM values 3-2 general purpose 6-1–6-3, 11-3, 11-9, 13-3, 13-6

GPIOC register 10-36–10-37 Hot Swap requirement 8-1

initialization control (CNTRL) 10-34–10-35 insertion and extraction, during 8-2 mapped accesses 1-3

mapped configuration registers 10-2

pin type 11-3, 11-7, 11-11, 11-13, 11-16

read 2-1

SMARTarget 1-1

space access 10-4, 10-7, 10-8, 10-9, 10-16, 10-17,

10-19, 10-20

tolerance 1-4

write 2-1


Дата добавления: 2015-07-10; просмотров: 88 | Нарушение авторских прав


Читайте в этой же книге: Pull-Up and Pull-Down Resistor Recomme Pin Description | Table 11-8. Test and Debug Pins | Table 11-11. Multiplexed Bus Mode Interface Pins | Table 12-5. Electrical Characteristics over Operating Range | Table 12-6. AC Electrical Characteristics (Local Inputs) over Operating Range | Table 12-7. AC Electrical Characteristics (Local Outputs) over Operating Range | Table 13-2. Symbol Definitions—PQFP Package | Table 13-4. Symbol Definitions—µBGA Package | Figure 13-5. 180-Pin µBGA PCB Layout Suggested Land Pattern | A B C D E F G H J K L M N P |
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