Table 12-5. Electrical Characteristics over Operating Range

Parameter	Description	Test Conditions	Min	Max	Units
V 1 OH	Output High Voltage	VDD = Min VIN = VIH or VIL	IOH = -12.0 mA	2.4	—	V
VOL1	Output Low Voltage	IOL = 12 mA	—	0.4	V
VIH	Input High Level	—	—	2.0	11.0	V
VIL	Input Low Level	—	—	-0.5	0.8	V
VOH3	PCI 3.3V Output High Voltage	VDD = Min VIN = VIH or VIL	IOH = -500 µA	0.9 VDD	—	V
VOL3	PCI 3.3V Output Low Voltage	IOL = 1500 µA	—	0.1 VDD	V
VIH3	PCI 3.3V Input High Level	—	—	0.5 VDD	VDD +0.5	V
VIL3	PCI 3.3V Input Low Level	—	—	-0.5	0.3 VDD	V
IIL	Input Leakage Current	VSS £ VIN £ VDD, VDD = Max	-10	+10	µA
I 2 LPC	DC Current Per Pin during Precharge	VP = 0.8 to 1.2V3	—	1.0	mA
IOZ	Three-State Output Leakage Current	VDD = Max	-10	+10	µA
ICC	Power Supply Current	VDD= 3.6V, PCLK = 33 MHz, LCLK = 60 MHz 80 outputs switching simultaneously	—		mA
ICCL ICCH ICCZ	Quiescent Power Supply Current	VCC = Max VIN= GND or VCC	—		µA

Notes:

1 Except in the case of EECS, EEDI, EESK, and LEDon# pins.

2 ILPCis the DC current flowing from VDDto Ground during precharge, as both PMOS and NMOS devices remain on during precharge. It is not the leakage current flowing into or out of the pin under precharge.

3 VPis precharge bias voltage.

LOCAL INPUTS

Definitions:

• THOLD —Time that an input signal is stable after the rising edge of the Local Clock.

• TSETUP —Setup time. The time that an input signal is stable before the rising edge of the Local Clock.

Local Clock

Inputs

T

S E T U P

Valid

T

H O L D

Figure 12-1. PCI 9030 Local Input Setup and Hold Waveform

Дата добавления: 2015-07-10