Table 2-9. Byte Number and Lane Cross-Reference

2.2.5.2 16-Bit Local Bus—

Big Endian Mode

For a 16-bit Local Bus, the PCI 9030 can be programmed to use upper or lower word lanes.

Byte Number	Byte Lane
Big Endian	Little Endian	Multiplexed Mode	Non-Multiplexed Mode
		LAD[7:0]	LD[7:0]
		LAD[15:8]	LD[15:8]
		LAD[23:16]	LD[23:16]
		LAD[31:24]	LD[31:24]

Burst Order	Byte Lane
First Transfer	Byte 0 appears on Local Data [31:24]
Byte 1 appears on Local Data [23:16]
Second Transfer	Byte 2 appears on Local Data [31:24]
Byte 3 appears on Local Data [23:16]

Table 2-11. Upper Word Lane Transfer— 16-Bit Local Bus

2.2.5.1 32-Bit Local Bus—

Big Endian Mode

Data is Lword aligned to the uppermost byte lane (Address Invariance).

Table 2-10. Lword Lane Transfer—32-Bit Local Bus

Table 2-12. Lower Word Lane Transfer— 16-Bit Local Bus

Burst Order	Byte Lane
First Transfer	PCI Byte 0 appears on Local Data [31:24]
PCI Byte 1 appears on Local Data [23:16]
PCI Byte 2 appears on Local Data [15:8]
PCI Byte 3 appears on Local Data [7:0]

Burst Order	Byte Lane
First Transfer	Byte 0 appears on Local Data [15:8]
Byte 1 appears on Local Data [7:0]
Second Transfer	Byte 2 appears on Local Data [15:8]
Byte 3 appears on Local Data [7:0]

Little Endian

BYTE 3

BYTE 2

BYTE 1

BYTE 0

0 31

Дата добавления: 2015-07-10