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Decoders and Multiplexers

Digital Logic for Computers

(ACOE161)

 

Experiment #7

Decoders and Multiplexers

 

 

Student’s Name: Reg. no.:
Semester: Spring 2015 Date: 14 November 2015

 

Assessment:

Assessment Point Weight Grade
Methodology and correctness of results    
Discussion of results    
Participation    
Assessment Points’ Grade:    

 

 

Comments:
 
 
 
 
 

 


Experiment #7:

 

Decoders and Multiplexers

 

 

Objectives:

 

The objectives of this experiment are to:

 

1. use decoders and multiplexers, and

2. to implement larger decoders/multiplexers from smaller ones.

 

Exercise 1:

 

(a) Complete Table 1 for a 2-to-4 decoder truth table with the outputs (L0-L3) and enable (E) are active low (0).

 

Table 1. 2-to-4 decoder truth table with Enable (~G). Active: Low.

E A B L0 L1 L2 L3
             
             
             
             
             
             
             
             

 

(b) The 74LS139 IC contains two (2) 2-to-4 decoders with VCC and GND as shown in Figure 1.

Figure 1. 74LS139 IC contains two (2) 2-to-4 decoders.

 


(c) Connect the 74LS139 IC on the breadboard and use switches S3/P2, S2/P1, S1/P0 for one set of inputs (~1G, 1A, 1B) and LEDs L0, L1, L2, and L3 to one set of outputs (1Y0, 1Y1, 1Y2, 1Y3). Draw all necessary connections on Figure 2.

 

Figure 2. 74LS139 IC Dual 2-to-4 decoders.

 

(d) Using the circuit in Figure 2 go through all the possible states and complete Table 2 below.

 

Table 2. 74LS139D IC truth table with Enable (E)

E /S3/P2 A /S2/P1 B /S1/P0 L0 L1 L2 L3
             
             
             
             
             
             
             
             

 


(e) Design and draw all the necessary connections to create a 3-to-8 decoder using both 2-to-4 decoders available on the 74LS139 IC and a 7404 IC on Figure 3.

 

Figure 3. 3-to-8 decoder using 74LS139 IC and 7404 IC.

 

(f) Complete Table 3 below based on the results of the circuit in Figure 3 for the 3-to-8 decoder.

 

Table 3. 3-to-8 decoder truth table with Enable (E). Active: Low.

E /S3/P2 A /S2/P1 B /S1/P0 L0 L1 L2 L3 L4 L5 L6 L7
                     
                     
                     
                     
                     
                     
                     
                     

 


Questions:

 

1. What is the purpose of the 7404 IC in the implementation of the 3-to-8 decoder in Figure 3?

 
 
 
 
 
 

 

2. Explain how a 4-to-16 decoder could be implemented using the 74LS139 IC. How many ICs would be required in this case?

 
 
 
 
 
 
 
 

 


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