Local Address

Big/Little Endian mode 2-10 bits LA[1:0] 2-2

expansion ROM local base address register 10-20 increment 11-13, 11-16

mapping 4-4

PCI 1-3, 4-7

base address registers 10-8–10-9

space bus region descriptor registers 10-21–10-27 space local base address registers 10-19–10-20 space range registers 10-16–10-17

spaces 1-5, 4-1, 10-2, 10-3

Local Bus 2-2–2-12

characteristics 4-5

configuration registers 10-3

control 4-4

Delayed Read mode, PCI Target 4-2 FIFO, response to full or empty 4-8 I/Os 8-2

independent interface pins 11-9 internal register access 3-6 memory map example 5-2

PCI Target 1-3, 1-5, 3-1, 4-1–4-7, 10-35

PCISR 10-5

pin information 11-1

PMCSR 10-13

power management 7-1

prefetch 4-3

programmable 1-3

Read Ahead mode, PCI Target 4-3 READY# Timeout 10-34

serial EEPROM 3-1

signaling 1-4, 1-5

soft reset 7-2

VPD 9-1

width 1-1, 4-7

LD[31:0]

to memory

Local Bus region descriptor registers 2-4, 4-5, 10-21–10-29, 11-14, 11-17

address mapping 10-3

Дата добавления: 2015-07-10