Table 11-2. Input Pin Pull-Up and Pull-Down Resistor Requirements

Abbreviation	Pin Type
DTS	Driven three-state, driven high for one-half CLK before float
I	Input only
I/O	Input and output
O	Output only
OD	Open drain
STS	Sustained three-state, driven high for one CLK before float
TP	Totem pole
TS	Three-state

Signal	Requirements
BD_SEL#/TEST	For CompactPCI Hot Swap, pull up to Early Power; otherwise, pull or tie low because the internal 50K-Ohm pull-down resistor is not sufficiently strong to guarantee proper operation.
BTERM#	If enabled, connect to a pull-up resistor to hold signal in an inactive state. If disabled for all local address spaces (default) in LAS x BRD and EROMBRD, tie high or low.
CPCISW	If CompactPCI Hot Swap is not used, pull or tie low
EEDO	Use an external pull-up resistor due to the weak value (50K Ohms) of the internal pull-up resistor. The pull-up resistor must be pulled to Early Power VDD in CompactPCI Hot Swap platforms and normal VDD in regular PCI platforms. A missing pull-up resistor for the EEDO signal may intermittently bring the PCI 9030 to a quiescent state. If no serial EEPROM is present, can be tied to VDD.
LCLK	Local clock is required. Must start prior to PCI RST# de-assertion.

Note: A “#” in the pin name indicates active low.

Note for PCI pins: DO NOT pull up or down on any pins unless the PCI 9030 is being used in an embedded design. Refer to PCI r2.2.

Signal	Requirements
LINTi[2:1]	If configured as level-sensitive (default) in INTCSR[9:8], connect to a pull-up or pull-down resistor to hold the signal in an inactive state, for the polarity configured in INTCSR[4, 1] (default is active-low). Unused pins can be tied to VDD or VSS to hold the input in the inactive state (VDD for default active-low configuration).
LPMESET	If used to trigger PME# assertion, connect to a pull-down resistor to hold the signal in the inactive state. If not used, pull low or tie to VSS.
LREQ	Pull or drive low, or tie to VSS to provide Local Bus ownership to the PCI 9030.
MODE	Tie high for Multiplexed mode, or low for Non-Multiplexed mode.
READY#	If enabled, connect to a pull-up resistor to hold the signal in an inactive state. If disabled or all local address spaces (default) in LAS x BRD and EROMBRD, tie high or low.
TCK	If JTAG is not used, tie high or low. If used, an external pull-up resistor is required.
TDI
TMS
TRST#	Must be pulled low during PCI RST# assertion. If JTAG is not used, it is recommended that TRST# always be pulled low to place JTAG functionality in the reset state and enable normal chip logic operation. (Refer to PCI 9030 Errata #5.)

Table 11-2. Input Pin Pull-Up and Pull-Down Resistor Requirements (Continued)

Three-State Output Pins

Three-state (TS) output pins are ADS#, ALE, BLAST#, CS[1:0]#, LA[23:2], LBE[3:0]#, LW/R#, RD#, TDO, and WR#.

The PCI 9030 drives Local Bus three-state output signals when it owns the Local Bus, and floats Local Bus three-state output signals when it does not own the Local Bus (LGNT asserted). Three-state output signals are also floated during PCI reset.

When the PCI 9030 is used in a system with multiple masters on the Local Bus, pull-up and/or pull-down resistors may be required on three-state output pins to hold control signals in the inactive state when the PCI 9030 does not own the Local Bus, and/or to reduce noise coupling between Local Bus devices.

Totem-Pole Output Pins

Totem-pole (TP) output pins are BCLKo, EECS, EEDI, EESK, LGNT, LPMINT#, and LRESETo#.

Totem-pole outputs are always driven, except when the BD_SEL#/TEST input is high and the EEDO input is low (IDDQ test state).

Open-Drain Output Pins

Open-drain (OD) output pins are ENUM# and LEDon#. (Refer to Table 11-3 for resistor requirements.)

Signal	Requirements
ENUM#	ENUM# is a three-state buffer that is configured as an output; therefore, a pull-up resistor is required to ensure the buffer input value is in a known state.
LEDon#	LEDon# is an open-drain output that is always enabled. HS_CSR[3] (default = 0) controls whether LEDon# sinks current or floats (default = OFF); therefore, neither a pull-up nor pull-down resistor is required. Note: LEDon# is also asserted while PCI RST# input is asserted.

Note: IEEE Standard 1149.1-1990 requires pull-up resistors on TDI, TMS, and TRST#. To remain compliant with PCI r2.2, no

internal pull-up resistors are provided on JTAG pins in the PCI 9030; therefore, the pull-up resistors must be externally added to the

PCI 9030.

Output Pins (Pin Type O)

This section discusses the pull-up and pull-down resistor requirements for the following Local Bus output pins—ADS#, ALE, BCLKo, BLAST#, CS[1:0]#, EECS, EEDI, EESK, ENUM#, LA[23:2], LBE[3:0]#, LEDon#, LGNT, LPMINT#, LRESETo#, LW/R#, RD#, TDO, and WR#.

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