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Register 10-61. (PMDATASEL; 70h) Hidden 1 Power Management Data Select

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Bit Description Read Write Value after Reset
7:0 D0 Power Consumed.Provides the power consumed in the D0 state. Value read from PMDATA register when Data_Select = 0. Refer to Note Serial EEPROM 0h
15:8 D3 Power Consumed.Provides the power consumed in the D3 state. Value read from PMDATA register when Data_Select = 3. Refer to Note Serial EEPROM 0h
23:16 D0 Power Dissipated.Provides the power dissipated in the D0 state. Value read from PMDATA register when Data_Select = 4. Refer to Note Serial EEPROM 0h
31:24 D3 Power Dissipated.Provides the power dissipated in the D3 state. Value read from PMDATA register when Data_Select = 7. Refer to Note Serial EEPROM 0h

Note: This register can be read only eight bits at a time, through PMDATA[7:0]. The eight bits of PMDATASEL returned in PMDATA[7:0] are selected by PMCSR[12:9].

 

 

Register 10-62. (PMDATASCALE; 74h) Hidden 2 Power Management Data Scale

 

Bit Description Read Write Value after Reset
1:0 Data_Scale 0.Provides the D0 Power Consumed scaling factor read in PMDATA[7:0]. Value read in PMCSR[14:13] when Data_Select = 0. Refer to Note Serial EEPROM  
3:2 Data_Scale 3.Provides the D3 Power Consumed scaling factor read in PMDATA[7:0]. Value read in PMCSR[14:13] when Data_Select = 3. Refer to Note Serial EEPROM  
5:4 Data_Scale 4.Provides the D0 Power Dissipated scaling factor read in PMDATA[7:0]. Value read in PMCSR[14:13] when Data_Select = 4. Refer to Note Serial EEPROM  
7:6 Data_Scale 7.Provides the D3 Power Dissipated scaling factor read in PMDATA[7:0]. Value read in PMCSR[14:13] when Data_Select = 7. Refer to Note Serial EEPROM  
31:8 Reserved. Refer to Note Serial EEPROM 0h

Note: This register can be read only two bits at a time, through PMCSR[14:13]. The two bits of PMDATASCALE returned in PMCSR[14:13] are selected by PMCSR[12:9].


 


 

 

11 PIN DESCRIPTION

 


PIN SUMMARY

Tables in this section describe each PCI 9030 pin. Table 11-5 through Table 11-10 provide pin information common to all Local Bus modes of operation:

• Power and Ground

• Serial EEPROM Interface

• Test and Debug

• PCI System Bus Interface

• PCI Mode Independent Interface

• Local Bus Mode Independent Interface

Pins in Table 11-11 and Table 11-12 correspond to the PCI 9030 Local Bus modes—Multiplexed and Non-Multiplexed:

• Multiplexed Bus Mode Interface Pin Description (32-bit address/32-bit data)

• Non-Multiplexed Bus Mode Interface Pin Description (32-bit address/32-bit data)

For a visual of the chip pinout, refer to Section 13, “Physical Specifications.”

The following table lists abbreviations used in this section to represent various pin types.

 


Дата добавления: 2015-07-10; просмотров: 163 | Нарушение авторских прав


Читайте в этой же книге: Register 10-2. (PCICR; PCI:04h) PCI Command | Register 10-8. (PCIHTR; PCI:0Eh) PCI Header Type | Register 10-13. (PCIBAR3; PCI:1Ch) PCI Base Address 3 for Accesses to Local Address Space 1 | Register 10-20. (CAP_PTR; PCI:34h) New Capability Pointer | Register 10-27. (PMC; PCI:42h) Power Management Capabilities | Register 10-33. (HS_CSR; PCI:4Ah) Hot Swap Control/Status | Register 10-39. (LAS1RR; 04h) Local Address Space 1 Range | Register 10-42. (EROMRR; 10h) Expansion ROM Range | Register 10-56. (CS3BASE; 48h) Chip Select 3 Base Address | Register 10-59. (CNTRL; 50h) PCI Target Response, Serial EEPROM, and Initialization Control |
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Register 10-60. (GPIOC; 54h) General Purpose I/O Control| Table 11-2. Input Pin Pull-Up and Pull-Down Resistor Requirements

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